The Keysight Technologies N4982 series of Clock Recovery Units provide a clean clock signal for BERT error detection, typically required when long delay time is in the channel. Each module has high input sensitivity, AC coupled data input terminated with a 50 ohm resistor to minimize reflections, low jitter output clock, and low power consumption.

Applications

BER testing with long fibre channels or re-circulating loops

BER testing active DUTs with re-clocked data paths

Optical transceiver production test

100 Gigabit Ethernet

Extract low jitter clock for SONET/SDH

Broadband tests

Features

N4982A-R19 operates from 19 to 26 Gb/s and 39.8 to 44.0 Gb/s

N4982A-R25 operates from 25.3 to 32 Gb/s

N4982A-R28 operates from 27.9 to 36 Gb/s

Single -3.3 V power supply

Low jitter output clock

Low power dissipation

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