In order to run a ParBERT 81250 system at least one clock module is necessary to generate the system clock.

Up to 4 Channels of Stressed Pattern Generation for High Speed DataCom Design Testing.
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Data sheet for the Keysight 81200 data generator/analyzer platform ( E4840A, E4849A and E48xxA modules)

J-BERT N4903B High-performance Serial BERT. The only complete jitter tolerance test now for next generation of forwarded and embedded clock designs such as QPI, PCIe™, DisplayPort, SATA, USB, FB-DIMM, Fibre Channel, 10GbE

The Keysight ParBERT 81250 40 Gb/s solutions are integrated bit error ratio (BER) measurement systems ideal for testing 16:1 and 4:1 OC-768 MUX and DeMUX devices.

The Keysight ParBERT 81250 2.7 Gb/s modules allow testing the parallel side of devices up to OC-768. The Keysight ParBERT 1.65 Gb/s modules offer an economical lower speed solution.

The N2101B PXIT Manufacturing BERT is a PXI module that has been designed for testing optical transceivers up to 10.3125 Gb/s

The new N4901B Serial BERT 13.5 Gb/s covers frequency ranges from 150 Mb/s to 13.5 Gb/s providing unmatched signal integrity and analysis capabilities.

The new N4902B Serial BERT 7 Gb/s is the industry-first product to specifically address the upcoming needs in the semiconductor and data communication industry.