The Kibra 380 is a stand-alone DDR3 protocol analyzer that provides comprehensive DDR3 bus and JEDEC timing analysis.

The Kibra 480 Compliance System provides DDR memory developers, implementers and integrators a cost effective solution to verify and validate that their DDR memory solution meets JEDEC compliance parameters. Kibra 480 supports either DDR3 or DDR4. The quick and easy hardware setup and immediate feedback on violations allow users to quickly validate their memory system meets JEDEC timing compliance or swiftly identify problem areas with their memory system. Capturing the Command Address and Control bus, the Kibra 480 can quickly identify timing issues associated with the JEDEC defined speed bins.

The SierraFC M164 system provides 16G Fibre Channel data capture and protocol verification for developers & protocol test engineers in storage networking and other Fibre Channel applications. Available with 4 recording channels, the SierraFC offers world-class protocol analysis capabilities with an easy to use, customizable hardware & software interface, large capture buffers, and standard support for Speed Negotiation and Forward Error Correction (FEC) enabled links.

The SierraNet M408 system provides 10/40Gbps Ethernet and 16G Fibre Channel data capture and protocol verification for developers & protocol test engineers in LAN, SAN, other Ethernet and Fibre Channel applications. Available with eight SFP+ FlexPortsTM for 10Gbps Ethernet and 16G Fibre Channel and two 40Gbps QSFP ports, the SierraNet offers world-class protocol analysis capabilities with an easy to use, customizable hardware & software interface, large capture buffers, and the most advanced triggering and filtering capabilities in the industry.

The SierraNet M168 system provides 10Gbps Ethernet and 16G Fibre Channel data capture and protocol verification for developers & protocol test engineers in LAN, SAN, other Ethernet and Fibre Channel applications. Available with eight SFP+ FlexPortsTM for 10Gbps Ethernet and 16G Fibre Channel, the SierraNet offers world-class protocol analysis capabilities with an easy to use, customizable hardware & software interface, large capture buffers, and the most advanced triggering and filtering capabilities in the industry.

The Teledyne LeCroy Eclipse MIPI M-PHY protocol analyzer is for customers developing M-PHY GEAR 1/2/3 at up to x4 lane width. Supporting MPCIe and SSIC, this protocol analyzer is the first to support the PCIe 3.1 specification. M-PCIe combines the PCI Express (PCIe) protocol layer with the low power M-PHY physical layer bringing high-end PCIe performance and software capabilities to low power mobile devices. SSIC is the USB-IF specification for SuperSpeed Interchip protocol and runs 5Gps USB traffic over the MIPI MPHY bus.

The SAS Sierra M124A Protocol Test System is Teledyne LeCroy’s 7th generation protocol analyzer system that provides 100% accurate protocol capture of both SAS (SAS 3.0) and SATA (SATA 3.0). The industry’s most widely used test platform for SAS and SATA features unmatched analysis and debug capabilities to help pinpoint problems at every layer of the protocol.

The SAS Sierra M122 Protocol Test System is Teledyne LeCroy’s 7th generation protocol analyzer system that provides 100% accurate protocol capture of both SAS (SAS 3.0) and SATA (SATA 3.0). The industry’s most widely used test platform for SAS and SATA features unmatched analysis and debug capabilities to help pinpoint problems at every layer of the protocol.

SATA Protocol Test System

The Sierra Protocol Test System is the 6th generation in the leading line of SATA protocol test solutions from the leading manufacturer of protocol test systems. Designed for the current evolution of SATA (SATA 3.0), the new Sierra product family sets new standards for performance while incorporating a complete range of features in a single, economical system.